The present invention relates generally to integrated circuit designs, and more particularly to structures and methods for placing devices of various operating voltages in the same isolation package.
In systems on chips (SoC), such as a semiconductor integrated circuit (IC) chip for a liquid crystal display (LCD) driver, isolation between circuit regions that operate at different voltages is necessary. Different regions of an IC can operate at two or more different voltages. The operating voltage of one device can have effects on its neighboring devices that operate at a different voltage. The voltage applied to the body of a metal-oxide-semiconductor (MOS) transistor can influence its threshold voltage VT. As the voltage on the body, which is primarily set on the backside of a semiconductor chip, changes, the density of electrons in the inversion layer beneath the gate also changes. This, in turn, may cause a shift of the threshold voltage VT.
There are other subtle influences that may cause a change of the threshold voltage VT. An example is the effect of lateral currents within an IC chip. Current can escape from devices that are not thoroughly isolated from the rest of the chip. This current may travel laterally in the substrate of the chip and induce a voltage drop at various lateral points. Therefore, although the backside of a chip is likely metallized, its voltage may not be the same at all lateral points within the lower substrate beneath the devices. This makes isolation for circuits of various operating voltages difficult. The circuits of various operating voltages cannot be placed on the same semiconductor chip unless they are properly isolated from the influence of the backside bias. Without proper isolation, there may be punch through between devices as depletion regions of the devices that operate at different voltages expand toward each other.
While an isolation structure may eliminate or reduce some of the problems discussed above, the structure typically occupies a significant amount of surface area on an IC chip. As such, desirable in the art of semiconductor designs are compact isolation structures that can properly isolate the circuits operating at different voltages from the influence of the backside bias.